DBATU Remedial Exam MCQs

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Digital Logic Design Remedial Exam MCQs 2

Q:   The combinational circuit given below is implemented with two NAND gates. To which of the following individual gates is its equivalent?

Q:   The time required for a pulse to change from 10 to 90 percent of its maximum value is called ...

Q:   The number of full and half-adders required to add 16-bit numbers is

Q:    Which of the following expressions is not equivalent to X ' ?

Q:    Which of the following gates is known as coincidence detector ?

Q:   A demultiplexer is used to

Q:   The digital multiplexer is basically a combination logic circuit to perform the operation

Q:   Output of the following circuit is

Q:   If four 4 input multiplexers drive a 4 input multiplexer, we get a:

Q:   A toggle operation cannot be performed using a single

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